Test pattern and method for measuring silicon etching depth

Abstract

Embodiments of a test pattern and a method for measuring silicon etching depth are provided. After a contact-hole forming process, an optical critical dimension (OCD) is measured with respect to a test pattern formed on a semiconductor chip, so that the silicon etching depth may be analyzed in real time. Critical dimensions of contact holes in the actual working cells of the semiconductor circuit would then coincide with the OCD measurement of the contact holes of the test pattern. Consequently, etching conditions for forming a contact hole may be controlled in real time, and thus a yield of a semiconductor can be effectively improved.

Dependencies are inferred from the claim text.