Edge seal for improving integrated circuit noise isolation
AssigneesFreescale Semiconductor, Inc., Motorola, Inc.
InventorsNeal Hollenbeck, Kenneth Haddad, William Roeckner
Life of this patent
Estimating the term…
Loading patent…
AssigneesFreescale Semiconductor, Inc., Motorola, Inc.
InventorsNeal Hollenbeck, Kenneth Haddad, William Roeckner
Estimating the term…
An edge seal structure and fabrication method are described. The edge seal structure includes a high impedance substrate containing a base material and a grounded floating edge seal that is on the substrate but is isolated from the base material. The edge seal contacts a first doped well in the substrate that has the same conductivity type as and is more heavily doped than the base material. The first doped well is in a second doped well that has a different conductivity type than the first doped well. The first and second doped wells and the base material form back-to-back series connected diodes. The wells are effectively connected to power and ground such that the diodes are reverse-biased. The edge seal is formed by a stack of conductive layers, at least some of which are surrounded by a stack of insulating layers.
An integrated circuit edge seal structure comprising:
A chip comprising:
A method of fabricating an integrated circuit edge seal structure, the method comprising:
Dependencies are inferred from the claim text.