Transistor and novolatile memory device including the same
OwnerJung-Dal Choi, Sang-Hun Jeon +2inventors
InventorsJung-Dal Choi, Sang-Hun Jeon, Young-Kwan Park, Keun-Ho Lee
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Abstract
A transistor includes a gate electrode on a substrate, source/drain regions in the substrate at both sides of the gate electrode, and a channel region defined between the source/drain regions, wherein the channel region includes a recessed region and at least one of the source/drain regions is spaced away from the recessed region of the channel region.
Claims20
A transistor, comprising:
- a gate electrode on a substrate;
- source/drain regions in the substrate at both sides of the gate electrode;
- and
- a channel region defined between the source/drain regions,
- wherein the channel region includes a recessed region and at least one of the source/drain regions is spaced away from the recessed region of the channel region.
A NAND-type nonvolatile memory device including selection transistors and a plurality of memory cell transistors serially connected between the selection transistors, wherein the selection transistor, comprises:
- a channel region in a substrate including a recessed portion;
- and
- a source/drain region shared by the memory cell transistor,
- wherein the source/drain region shared by the cell transistor is spaced away from the recessed portion.
Dependencies are inferred from the claim text.