Voltage supply interface circuit
AssigneeSTMicroelectronics S.r.l.
InventorsJerome Heurtier, Samuel Menard
Life of this patent
Estimating the term…
Abstract
A monolithic interface circuit for providing a voltage, from a control circuit supplied by a supply voltage referenced to a reference voltage, to a terminal likely to be at a high voltage with respect to the reference voltage, comprising a high-voltage N-channel MOS transistor having its gate intended to receive a control signal referenced to the reference voltage and having its source intended to be connected to the reference voltage, and a high-voltage PNP transistor having its base connected to the drain of the MOS transistor, having its emitter intended to receive the supply voltage and having its collector intended to provide a voltage to the terminal likely to be at a high voltage.
Claims12
A monolithic interface circuit for providing a voltage, from a control circuit supplied by a supply voltage referenced to a reference voltage, to a terminal likely to be at a high voltage with respect to the supply and reference voltages, wherein the high voltage is higher than the supply voltage, the interface circuit comprising:
- a high-voltage N-channel MOS transistor having its gate intended to receive a control signal referenced to the reference voltage and having its source intended to be connected to the reference voltage, and
- a high-voltage PNP transistor having its base connected to the drain of the MOS transistor, having its emitter intended to receive the supply voltage, and having its collector intended to provide a voltage to the terminal likely to be at a high voltage, wherein when the terminal is at high voltage, the high voltage PNP transistor protects the supply voltage from receiving the high voltage and the high voltage N-channel MOS transistor protects the control circuit from receiving the high voltage.
A method of providing a monolithic interface circuit for providing a voltage, from a control circuit supplied by a supply voltage referenced to a reference voltage, to a terminal likely to be at a high voltage with respect to the supply and reference voltages, wherein the high voltage is higher than the supply voltage, the method comprising:
- using a high-voltage N-channel transistor having its gate intended to receive a control signal referenced to the reference voltage and having its source intended to be connected to the reference voltage, wherein the high-voltage N-channel transistor protects the control circuit from receiving the high voltage;
- and
- using a high-voltage PNP transistor having its base connected to the drain of the MOS transistor, having its emitter intended to receive the supply voltage, and having its collector intended to provide a voltage to the terminal likely to initially be at a high voltage, wherein the high-voltage PNP transistor protects the supply voltage from receiving the high voltage.
An interface circuit, comprising:
- a MOS transistor having a control terminal to receive a first signal;
- a bipolar transistor coupled to the MOS transistor, the bipolar transistor providing a supply voltage to an output terminal of the bipolar transistor in response to receiving a second signal from the MOS transistor;
- wherein, when the bipolar transistor is not providing the supply voltage to the output terminal, the control terminal of the MOS transistor is protected from a voltage higher than the supply voltage received at the output terminal of the bipolar transistor.
Dependencies are inferred from the claim text.