Semiconductor device and manufacturing method for the same

A semiconductor device, which includes insulating gate type first and second transistors formed on an SOI substrate composed of a semiconductor support substrate, a buried insulating film and a semiconductor layer, wherein

• each of said first and second transistors comprises:
• a gate insulating film selectively formed on said semiconductor layer;
• a gate electrode formed on said gate insulating film;
• and
• source/drain regions formed in said semiconductor layer to sandwich a body region which is a region of said semiconductor layer beneath said gate electrode, wherein
• said source/drain regions in said first transistor have a recess structure where the level of the surface thereof is lower than the level of the surface of said body region, and said source/drain regions are formed to penetrate through said semiconductor layer, and
• said source/drain regions in said second transistor do not have said recess structure and are formed to leave a portion of said semiconductor layer beneath without penetrating through said semiconductor layer.

A semiconductor device which includes insulating gate type transistors formed on a semiconductor substrate, wherein

• said transistors comprise:
• a gate insulating film selectively formed on said semiconductor layer;
• a gate electrode formed on said gate insulating film;
• source/drain regions formed to sandwich a body region which is a region of said semiconductor layer beneath said gate electrode, said source/drain regions having a recess structure where the level of the surface is lower than the level of the surface of said body region, in terms of the positional relationship;
• and
• a portion for forming a nitride film covering said transistors having said recess structure and including at least a nitride film.

A manufacturing method for a semiconductor device which includes insulating gate type first and second transistors, comprising the steps of:

• (a) preparing an SOI substrate composed of a semiconductor support substrate, a buried insulating film and a semiconductor layer;
• (b) providing a first SOI region having a first film thickness and a second SOI region having a second film thickness which is smaller than said first film thickness by changing the film thickness in a portion of said semiconductor layer;
• (c) forming a pattern for element isolation for said first and second transistors above said semiconductor layer;
• (d) forming an element isolation region for said first and second transistors on the basis of said pattern for element isolation;
• and
• (e) forming first and second transistors in said first and second SOI regions, wherein said step (e) comprises the steps of:
• (e-1) forming a gate insulating film and a gate electrode on each of said first and second SOI regions selectively and in sequence;
• (e-2) forming a recess outside the body region beneath said gate electrode in said first SOI region;
• and
• (e-3) forming source/drain regions in said semiconductor layer to sandwich said body region and to penetrate through said semiconductor layer in said first and second SOI regions, said source/drain regions in said first SOI region formed at least beneath said recess, wherein
• said gate insulating film, said gate electrode and said source/drain regions formed in said first and second SOI regions define said first and second transistors, respectively.