Method of forming a well of a NAND flash memory device
AssigneeHynix Semiconductor Inc.
InventorHee Youl Lee
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Abstract
Disclosed herein are a NAND flash memory device and a method of forming a well of the NAND flash memory device. Triple wells of a NAND flash memory device are formed within a cell region in plural. A cell block including flash memory cells is formed on the triple wells. Accordingly, during an erase operation of a flash memory device, a stress time for non-selected blocks can be reduced and erase disturbance can be also prevented, through the plurality of the wells. Further, capacitance between the triple P wells and the triple N well is reduced since triple P wells are divided. Therefore, well bias charging and discharging time can be reduced and an overall erase time budget can be thus reduced.
Claims3
A method of forming a well of a NAND flash memory device, the method comprising:
- forming, on a P-type semiconductor substrate, a first mask through which the entire cell region is opened or a cell region is opened as much as a multiple of 2 or 3;
- performing a N-type ion implant process using the first mask as an ion implant mask to form a triple N well within the P-type semiconductor substrate;
- forming a second mask through which the entire triple N well region of the semiconductor substrate in which the triple N well is formed is opened or a triple N well region is opened as much as a multiple of 2 or 3;
- and,
- performing a P-type ion implant process using the second mask as an ion implant mask to form a triple P well within the triple N well.
Dependencies are inferred from the claim text.