Utilizing sidewall spacer features to form magnetic tunnel junctions in an integrated circuit

A semiconductor wafer comprising a plurality of integrated circuits, the plurality of integrated circuits comprising one or more magnetic tunnel junctions formed at least in part by the steps of:

• forming a film stack, the film stack comprising one or more magnetic layers;
• forming one or more trenches in the film stack, sidewalls of the one or more trenches being substantially vertical;
• forming a spacer layer at least partially on top of the film stack;
• etching the spacer layer such that portions of the spacer layer only remain on the sidewalls of the one or more trenches in the film stack;
• and
• etching at least a portion of the film stack utilizing the etched spacer layer as a mask.

An integrated circuit comprising one or more magnetic tunnel junctions, the one or more magnetic tunnel junctions formed at least in part by the steps of:

• forming a film stack, the film stack comprising one or more magnetic layers;
• forming one or more trenches in the film stack, sidewalls of the one or more trenches being substantially vertical;
• forming a spacer layer at least partially on top of the film stack;
• etching the spacer layer such that portions of the spacer layer only remain on the sidewalls of the one or more trenches in the film stack;
• and
• etching at least a portion of the film stack utilizing the etched spacer layer as a mask.