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US 2007/0164439 A1Published application
In-situ deposition for cu hillock suppression
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChung-Hsien Chen, Chun-Chieh Lin, Minghsing Tsai, Shau-Lin Shue
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Abstract
A semiconductor interconnect structure having reduced hillock formation and a method for forming the same are provided. The semiconductor interconnect structure includes a conductor formed in a dielectric layer. The conductor includes at least three sub-layers, wherein the ratio of the impurity concentrations in neighboring sub-layers is preferably greater than about two.
Claims16
A metal interconnect structure comprising:
- a trench in a dielectric layer;
- a barrier layer on sidewalls of the trench;
- and
- a conductor in the trench, wherein the conductor comprises:
- a first sub-layer having a first impurity concentration over the barrier layer;
- a second sub-layer having a second impurity concentration on the first sub-layer;
- and
- a third sub-layer having a third impurity concentration on the second sub-layer, wherein ratios of impurity concentrations in neighboring sub-layers are greater than about two.
5 more elements
A metal interconnect structure comprising:
- a trench in a dielectric layer:
- a barrier layer on sidewalls of the trench;
- and
- a conductor in the trench, wherein the conductor has an impurity concentration alternating between high impurity concentrations and low impurity concentrations, and wherein the high impurity concentrations and the low impurity concentrations have a ratio of greater than about two.
1 more element
Dependencies are inferred from the claim text.