Processor with register dirty bit tracking for efficient context switch
AssigneeSun Microsystems, Inc.
InventorsMarc Tremblay, William Joy
Life of this patent
Estimating the term…
Loading patent…
AssigneeSun Microsystems, Inc.
InventorsMarc Tremblay, William Joy
Estimating the term…
A processor including a large register file utilizes a dirty bit storage coupled to the register file and a dirty bit logic that controls resetting of the dirty bit storage. The dirty bit logic determines whether a register or group of registers in the register file has been written since the process was loaded or the context was last restored and, if written generates a value in the dirty bit storage that designates the written condition of the register or group of registers. When the context is next saved, the dirty bit logic saves a particular register or group of registers when the dirty bit storage indicates that a register or group of registers was written. If the register or group of registers was not written, the context is switched without saving the register or group of registers. The dirty bit storage is initialized when a process is loaded or the context changes.
A processor that maintains, for registers accessible using register specifiers of instructions executable by the processor, indications that data encoded in one or more respective ones of the registers have been updated since a most recent event that results in correspondence with saved register context.
A context switch controller in a processor, the context switch controller comprising:
A method of efficiently supporting a context switch in a processor, the method comprising:
Dependencies are inferred from the claim text.