Method for accessing digital data information, and data processing method and device
AssigneeVIA Technologies, Inc.
InventorsIan Su, Roy Wang
Life of this patent
Estimating the term…
Abstract
A method for accessing digital data information is used for reducing accessing time when a processor accesses digital data from a register. The method comprises the steps of accessing data from a register with a processor, continuously accessing data from the register with the processor if the data in the register is valid, enabling an identifier register with the processor if the data in the register is invalid, transmitting an interrupt signal to the processor, disabling the identifier register with the processor, and accessing the data from the register with the processor.
Claims14
A method for accessing digital data information, comprising:
- accessing data from a register with a processor;
- if the data in the register is valid, continuously accessing the data with the processor;
- if the data in the register is invalid, enabling an identifier register with the processor;
- when a predetermined ratio of the capacity of the register is loaded with new data, transmitting an interrupt signal to the processor;
- disabling the identifier register with the processor;
- and
- accessing the new data from the register with the processor.
A data processing method, comprising:
- accessing data from a register with a processor;
- when there is no data recorded in the register, setting the content of an identifier register to 1;
- when a predetermined ratio of the capacity of the register is recorded with the data and the content of the identifier register is 1, transmitting an interrupt signal to the processor;
- when the processor receives the interrupt signal, setting the content of the identifier register to 0;
- and
- accessing the data from the register with the processor.
A data processing device, comprising:
- a register, which is for temporarily storing data;
- a processor, which is capable of accessing the data from the register;
- an identifier register, which indicates whether to transmit an interrupt signal to the processor;
- and
- a monitoring unit, which monitors that whether a predetermined ratio of the capacity of the register is recorded with new data, wherein the content of the identifier register is set to 1 when the data accessed from the register with the processor are invalid, the interrupt signal is transmitted to the processor when the predetermined ratio of the capacity of the register is recorded with the new data, and the content of the identifier register is set to 0 and the data of the register are accessed when the processor receives the interrupt signal.
Dependencies are inferred from the claim text.