Circuit and method of detecting and resolving stuck I2C buses
AssigneeLinear Technology Corporation
InventorsGeorge Humphrey, William Martin
Life of this patent
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AssigneeLinear Technology Corporation
InventorsGeorge Humphrey, William Martin
Estimating the term…
A integrated circuit (IC) implementation of a protection circuit detects and resolves a fault on a bus, such as a stuck-low condition on an I2C bus. The circuit includes logic that detects a fault condition caused by the slave device, e.g. when one or both lines are low for a period longer than a timeout value in the I2C example. Upon detecting the fault condition, the logic disconnects the slave device from the data line and the clock line, for example by activation of switches incorporated in the IC. This typically frees the bus for use by other devices. The logic may also send the slave device one or more clock signals to clear the fault and/or a stop bit when the fault clears to reset the data register in the slave device.
A method of detecting and resolving a fault on a bus for providing communications between first and second devices, comprising:
An integrated circuit, for detecting and resolving a fault on a bus providing communications between first and second devices, the bus comprising a data line and a clock line, the protection circuit comprising:
An integrated circuit for interfacing a slave device to a bus comprising a data line and a clock line, the clock line carrying clock signals from a master device to the slave device to enable the slave device to apply data to the data line for communication to the master device, the circuit comprising:
Dependencies are inferred from the claim text.