Non-volatile memory and fabrication method thereof

Abstract

A non-volatile memory cell is provided. The non-volatile memory includes a substrate, a gate stacked layer, an isolation layer and a conductive layer. The gate stacked layer includes a tunneling layer, a charge trapping layer, a barrier layer and a control gate layer sequentially stacked over the substrate, and the stacked gate layer has an opening therein through these layers. The isolation layer is located on the surface of the opening. The conductive layer is disposed in the opening to cover the isolation layer.

Dependencies are inferred from the claim text.