Interleaving and de-interleaving methods, wireless apparatus and semiconductor apparatus of same

A wireless apparatus having an interleaving and de-interleaving function for rearranging data in a prescribed sequence, comprising:

• a state control unit for outputting state information for the purpose of selecting a RAM as the access target from among a plurality of RAM and specifying an address;
• a ROM for memorizing address data for specifying addresses of the plurality of RAM;
• a ROM address control unit for specifying a readout address of the ROM based on the state information;
• and
• a RAM access control unit for outputting a selection signal for selecting a RAM as the access target among the plurality of RAM based on the state information, wherein
• the state control unit outputs state information of a first mode for rearranging data and that of a second mode for not rearranging data.

A semiconductor apparatus comprising an interleaving and de-interleaving process unit for rearranging data in a prescribed sequence, comprising on a semiconductor integrated circuit board:

• a state control circuit for outputting state information for the purpose of selecting a RAM as the access target from among a plurality of RAM and specifying an address;
• a ROM for memorizing address data for specifying addresses of the plurality of RAM;
• a ROM address control circuit for specifying a readout address of the ROM based on the state information;
• a RAM address control circuit for specifying an address of a RAM as the access target among the plurality of RAM based on address data output from the ROM;
• and
• a RAM access control circuit for outputting a selection signal for selecting a RAM as the access target among the plurality of RAM based on the state information.

A wireless apparatus comprising an interleaving and de-interleaving function for rearranging data in a prescribed sequence, comprising:

• a RAM for writing, and reading out, data;
• and
• a state control unit, wherein
• the state control unit specifies an address of the RAM and carries out an interleaving and an de-interleaving processings.

A semiconductor apparatus comprising an interleaving and de-interleaving process unit for rearranging data in a prescribed sequence, comprising:

• a RAM for writing, and reading out, data;
• and
• a state control unit, wherein
• the state control unit outputs a first mode state information and a second mode state information for carrying out an interleaving processing and a de-interleaving processing.