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US 2006/0231910 A1Published application
Method for forming silicide and semiconductor device formed thereby
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTung-Heng Hsieh, Chien-Li Cheng, Yi-Shien Mor, Yung-Shun Chen
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Abstract
A method for forming silicide and a semiconductor device formed thereby. A Si-containing polycrystalline region is converted to an amorphous region, and annealed to form a regrown polycrystalline region having an increased grain size. A silicide layer is formed by reacting a metal and the regrown polycrystalline region having the increased grain size.
Claims37
A method for forming a silicide layer, comprising:
- providing a Si-containing polycrystalline region having a Si grain size;
- converting the Si-containing polycrystalline region to a Si-containing amorphous region;
- annealing the Si-containing amorphous region to form a regrown polycrystalline region having an increased Si grain size;
- and
- forming a silicide layer by reacting a metal and the regrown polycrystalline region having the increased Si grain size.
2 more elements
A method for forming a silicide layer, comprising:
- providing a substrate having a gate dielectric layer;
- forming a Si-containing polycrystalline layer on the gate dielectric layer;
- performing a pre-amorphization implant on the Si-containing polycrystalline layer to convert an upper portion thereof to an amorphous region;
- annealing the amorphous region to form a regrown polycrystalline region;
- patterning the Si-containing polycrystalline layer comprising the regrown polycrystalline region and the gate dielectric layer to form a gate;
- forming a pair of source/drain regions in the substrate;
- forming a metal layer covering at least the regrown polycrystalline region;
- and
- annealing the metal layer to form a silicide layer on the gate.
6 more elements
A semiconductor device, comprising:
- a substrate;
- a MOS transistor on the substrate comprising a gate and a pair of source/drain regions, wherein the gate comprising a Si-containing polycrystalline layer has a larger grain size in an upper portion than in a lower portion;
- and
- a silicide layer on the gate.
1 more element
A semiconductor device, comprising:
- a Si-containing polycrystalline layer having a larger grain size in an upper portion than in a lower portion;
- and
- a silicide layer on the Si-containing polycrystalline layer.
Dependencies are inferred from the claim text.