Semiconductor device with FinFET and method of fabricating the same

A method of fabricating a semiconductor device comprising:

• forming a dummy gate extending on an active region of a semiconductor substrate;
• providing a shielding layer on the dummy gate, and planarizing the shielding layer using the dummy gate as an end point of planarization;
• selectively removing the dummy gate with respect to the shielding layer;
• performing local channel ion implantation to form a channel ion implantation layer within the active region using the shielding layer as an ion implantation mask;
• etching the semiconductor substrate using the shielding layer as an etch mask to form a central trench that exposes the channel ion implantation layer;
• recessing the shielding layer;
• depositing a gate oxide layer in the central trench;
• forming a gate electrode on the gate oxide layer;
• and
• forming a source region and a drain region in the active region at both sides of the gate electrode.

A method of fabricating a semiconductor device comprising:

• forming an active region hard mask on a semiconductor substrate;
• etching the substrate using the active region hard mask as an etch mask to define an active region projecting from a surface of the substrate and to form a trench encircling the active region;
• isotropically etching the active region hard mask to form a hard mask pattern that exposes a top perimeter of the active region;
• filling the trench with a gap fill oxide layer, and planarizing the gap fill oxide layer using the hard mask pattern as an end point of planarization;
• forming a line type mask extending on the gap fill oxide layer and the hard mask pattern;
• patterning the gap fill oxide layer and the hard mask pattern using the line type mask as an etch mask to form a dummy pattern including at least one channel region defining pattern in a central portion thereof;
• providing a shielding layer on the line type mask, and planarizing the shielding layer using the line type mask as an end point of planarization;
• selectively removing the line type mask and the channel region defining pattern with respect to the shielding layer to form an opening that exposes a surface of the active region;
• local channel ion implanting via the opening to form a channel ion implantation layer within the active region;
• etching the active region under the opening to form a central trench in a portion of the active region including a fin channel at sides of the central trench;
• recessing the shielding layer and the gap fill oxide layer to provide a device isolating layer about the active region, and exposing a fin channel that has a first projection and a second projection composed of a surface of the substrate arranged in parallel and at each side of the central trench between the central trench and the device isolating layer, the upper surface regions and side surface regions of the first projection and the second projection comprising a channel region;
• forming a gate oxide layer on the fin;
• forming a gate electrode on the gate oxide layer;
• and
• forming a source region and a drain region in the active region at both sides of the gate electrodes.