Semiconductor device having fine contacts and method of fabricating the same

A semiconductor device comprising:

• a semiconductor substrate having a conductive region;
• first gate lines and second gate lines running along the semiconductor substrate and electrically conductively connected to the conductive region of the semiconductor substrate, the widths of the first gate lines being different from the widths of the second gate lines;
• a first interlayer insulating layer disposed on the semiconductor substrate, and covering the first gate line and the second gate line;
• first annular spacers situated in the interlayer insulating layer and arrayed in a row;
• first contacts extending through the interlayer insulating layer and between a pair of adjacent ones of the first gate lines, and electrically conductively connected to the conductive region of the substrate, each of the first contacts surrounded by a respective one of the first spacers;
• and
• a respective second contact buried in the interlayer insulating layer between each pair of the first spacers that are adjacent to each other in said row, extending between said pair of adjacent ones of the first gate lines, and electrically conductively connected to the conductive region of the substrate, wherein the first and second contacts are aligned and alternately disposed in a first direction in said row.

A method of forming contact structure of a semiconductor device, comprising:

• providing a substrate having a conductive region;
• forming an interlayer insulating layer on the substrate;
• forming first contact holes in the interlayer insulating layer;
• forming first spacers that cover the sides of the first contact holes, respectively, and leave second contact holes therein;
• removing the interlayer insulating layer from between the first spacers, thereby forming at least one third contact hole;
• and
• filling the second contact holes and the at least one third contact hole with conductive material, thereby forming first contacts in the second contact holes, respectively, and a respective second contact in each said at least one third contact hole, wherein the first and second contacts are aligned and alternately disposed in a row in a first direction.

A method of forming a semiconductor device, comprising:

• providing a semiconductor substrate having a conductive region, and first gate lines and second gate lines running along the semiconductor substrate and electrically conductively connected to the conductive region of the semiconductor substrate, wherein the widths of the first gate lines are different from the widths of the second gate lines;
• forming a first interlayer insulating layer on the semiconductor substrate, and over the first and second gate lines;
• forming recesses in an upper portion of the first interlayer insulating layer located over a portion of the first interlayer insulating layer extending between adjacent ones of the first gate lines, the recesses constituting first contact holes, respectively;
• forming first spacers that cover the sides of the first contact holes, respectively, and leave second contact holes therein;
• extending the second contact holes downward through the first interlayer insulating layer and to the semiconductor substrate, thereby forming third contact holes that expose the semiconductor substrate at locations between the adjacent ones of the first gate lines;
• removing the first interlayer insulating layer from beneath locations between the first spacers, thereby forming at least one fourth contact hole;
• and
• filling the third and the fourth contact holes with conductive material, thereby forming first contacts in the third contact holes and a second contact in each said at least one fourth contact hole.

A method of forming contact structure of a semiconductor device, comprising:

• providing a substrate having a conductive region;
• forming an interlayer insulating layer on the substrate;
• forming first contact holes in the interlayer insulating layer;
• forming first contact holes in the interlayer insulating layer;
• forming first spacers that cover the sides of the first contact holes, respectively, and leave second contact holes therein that expose the interlayer insulating layer, wherein the interlayer insulating layer exhibits an etch selectivity relative to the first spacer material with respect to a first etch process;
• etching the interlayer insulating layer from between the first spacers using said first etch process, thereby forming at least one third contact hole;
• and
• filling the second contact holes and the at least one third contact hole with conductive material, thereby forming first contacts in the second contact holes, respectively, and a respective second contact in each said at least one third contact hole, wherein the first and second contacts are aligned and alternately disposed in a row in a first direction.