Non-volatile memory device capable of preventing damage by plasma charge
AssigneeHynix Semiconductor Inc.
InventorTae Kim
Life of this patent
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Abstract
A non-volatile memory device for preventing damage by plasma charges includes a gate electrode formed on a predetermined region of a semiconductor substrate, a source/drain region which is overlapped with the gate electrode and formed in a first well region of the semiconductor substrate, a first metal line coupled to the gate electrode through a first contact plug, a second metal line coupled to the first metal line through a second contact plug so that an external voltage is transferred to the gate electrode, a junction region formed in a second well region separated from the first well region, and a third metal line coupled to the junction region through a third contact plug and coupled to the second metal line through a fourth contact plug.
Claims11
A non-volatile memory device comprising:
- a gate electrode formed on a predetermined region of a semiconductor substrate;
- a source/drain region that extends below the gate electrode and formed in a first well region of the semiconductor substrate;
- a first metal line coupled to the gate electrode through a first contact plug;
- a second metal line coupled to the first metal line through a second contact plug so that an external voltage is transferred to the gate electrode;
- a junction region formed in a second well region of the semiconductor substrate, the second well region being separated from the first well region;
- and
- a third metal line coupled to the junction region through a third contact plug and coupled to the second metal line through a fourth contact plug.
A non-volatile memory device comprising:
- a gate electrode formed on a predetermined region of a semiconductor substrate;
- a source/drain region provided adjacent to the gate electrode and formed in a first well region of the semiconductor substrate;
- a first metal line coupled to the gate electrode through a first contact plug;
- a second metal line coupled to the first metal line through a second contact plug so that an external voltage is transferred to the gate electrode;
- a triple well region of the semiconductor substrate, the triple well region being separated from the first well region;
- and
- a third metal line coupled to the triple well region through a third contact plug and coupled to the second metal line through a fourth contact plug.
Dependencies are inferred from the claim text.