Method of adding fabrication monitors to integrated circuit chips

A method of fabricating an integrated circuit, comprising:

• (a) generating a photomask level design of an integrated circuit design of said integrated circuit, said photomask level design comprising a multiplicity of integrated circuit element shapes;
• (b) designating regions of said photomask level design between adjacent integrated circuit element shapes, said designated regions large enough to require placement of fill shapes between said adjacent integrated circuit elements based on fill shape rules, said fill shapes not required for the operation of said integrated circuit;
• (c) placing one or more monitor structure shapes of a monitor structure in at least one of said designated regions, said monitor structure not required for the operation of said integrated circuit;
• (d) placing fill shapes in said designated regions of said photomask design level, said fill shapes not connected to said multiplicity of integrated circuit element shapes or to said one or more monitor structure shapes;
• (e) generating a mask data set from said photomask level design;
• and
• (f) using said mask data set to form a pattern on a wafer in order to fabricate a physical level of said integrated circuit.

An integrated circuit chip, comprising:

• a dielectric layer on a substrate, said dielectric layer having a circuit region containing integrated circuits required for operation of said integrated circuit chip and a surrounding scribe line region not containing integrated circuits required for operation of said integrated circuit chip;
• a multiplicity of wires of an integrated circuit, said wires formed in said circuit region of said dielectric layer;
• and
• a monitor structure and a multiplicity of fill shapes in regions of said dielectric layer between said wires, said monitor structure and said fill shapes not required for the operation of said integrated circuit, said monitor structure not connected to said wires, said fill shapes not connected to said wires and said monitor structure not connected to said fill shapes.

A computer system comprising a processor, an address/data bus coupled to said processor, and a computer-readable memory unit coupled to communicate with said processor, said memory unit containing instructions that when executed implement a method for designing an integrated circuit said method comprising the computer implemented steps of:

• (a) generating a photomask level design of an integrated circuit design of said integrated circuit, said photomask level design comprising a multiplicity of integrated circuit element shapes;
• (b) designating regions of said photomask level design between adjacent integrated circuit element shapes, said designated regions large enough to require placement of fill shapes between said adjacent integrated circuit elements based on fill shape rules, said fill shapes not required for the operation of said integrated circuit;
• and
• (c) placing one or more monitor structure shapes of a monitor structure in at least one of said designated regions, said monitor structure not required for the operation of said integrated circuit.