Data converter and a delay threshold comparator

A circuit, comprising:

• a first delay element to delay a signal based on a number of bits in a data value having a predetermined logical value;
• a second delay element to delay the signal based on a number of bits in a reference value having the predetermined logical value;
• and
• a comparator to generate a bit value based on the delayed signals.

A conversion method, comprising:

• (a) determining whether a 2N-bit data value has more bits of a predetermined logical value than a reference value;
• (b) generating a converted bit based on a result of (a);
• (c) setting the reference value based on a value of the converted bit;
• and
• (d) repeating (a)-(c) N-1 times, wherein the N converted bits generated by (a)-(d) are indicative of a total number of bits in the 2N-bit data value that corresponds to the predetermined logical value.

A system, comprising:

• a first circuit;
• and
• a second circuit having a converter to convert 2N-bit data into an N-bit value indicating a number of bits in the data that have a predetermined logical value, the converter including:
• N comparators to generate respective bit values in the N-bit value, each comparator to determine whether the number of bits in the data having the predetermined logical value exceeds a respective one of a plurality of reference values, a first one of the reference values equals a predetermined value and remaining ones of the reference values based on the bit values output from one or more preceding ones of the N comparators, and the second circuit is to perform a logical operation based on the N-bit value output from the first circuit.