Boundary scan controller, semiconductor device, method for identifying semiconductor circuit chip of semiconductor device, and method for controlling semiconductor circuit chip of semiconductor device

A boundary scan controller which is disposed in a semiconductor circuit chip, for controlling a shift register circuit composed of boundary scan cells respectively disposed between external signal input terminals and input terminals of an internal logic circuit and between external signal output terminals and output terminals of the internal logic circuit which are connected in series, comprising:

• a clock input part for providing input/output timings;
• a test mode input part for providing the predetermined operation instruction;
• a data input part for inputting the identification data and test data of the semiconductor circuit chip;
• storage means for storing the identification data therein;
• control means for executing the predetermined operation instruction so as to store the identification data in the storage means, and for performing a circuit test with the test data so as to obtain test result data;
• a data output section for outputting the test result data obtained by the control means, the data output section always carrying out the output;
• fixed-data holding means for holding predetermined fixed data therein;
• comparison means for making a comparison as to whether or not the identification data and the fixed data are in agreement, and outputting comparison result information;
• and
• a data derivation section for deriving data corresponding to the test result data which is outputted from the data output section, on the basis of the comparison result information from the comparison means.