Controllable varactor within dummy substrate pattern
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChung-Long Cheng, Kong-Beng Thei, Sheng-Yuan Lin
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Abstract
A dummy region varactor for improving a CMP process and improving electrical isolation from active areas and a method for forming the same, the varactor including a semiconductor substrate having a dummy region said dummy region including a first well region having a first polarity; shallow trench isolation (STI) structures disposed in the dummy region defining adjacent mesa regions comprising first, second, and third mesa regions; a second well region having a second polarity underlying the first mesa region having the second polarity to form a PN junction interface; wherein said second and third mesa regions having the first polarity are formed adjacent either side of said first mesa region.
Claims20
An integrated circuit device comprising:
- a semiconductor substrate comprising a first well region having a first polarity;
- shallow trench isolation (STI) structures disposed in the substrate defining adjacent mesa regions comprising first, second, and third mesa regions;
- a second well region having a second polarity underlying the first mesa region comprising the second polarity to form a PN junction interface;
- wherein said second and third mesa regions comprising the first polarity are formed adjacent either side of said first mesa region.
An integrated circuit device comprising:
- a semiconductor substrate comprising a first well region having a first polarity;
- shallow trench isolation (STI) structures disposed in the substrate defining adjacent mesa regions comprising first, second, and third mesa regions;
- a second well region having a second polarity underlying the first mesa region comprising the second polarity to form a PN junction interface;
- wherein said second and third mesa regions comprising the first polarity are disposed adjacent either side of said first mesa region;
- and,
- wherein electrical interconnects to carry a voltage signal are disposed to electrically connect to the respective first, second and third mesa regions to form a varactor.
A method of forming an integrated circuit device comprising the steps of:
- providing a semiconductor substrate comprising a dummy region said dummy region comprising a first well region having a first polarity;
- forming shallow trench isolation (STI) structures in the dummy region defining adjacent mesa regions comprising first, second, and third mesa regions;
- wherein said second and third mesa regions comprising the first polarity are formed adjacent either side of said first mesa region;
- and,
- forming a second well region having a second polarity underlying the first mesa region comprising the second polarity to form a PN junction interface;
Dependencies are inferred from the claim text.