Semiconductor device with increased channel length and method for fabricating the same
AssigneeHynix Semiconductor Inc.
InventorJun-Hee Cho
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes a trench formed in a predetermined portion of a substrate and a first recess region beneath the trench. A field oxide layer is buried into both the trench and the first recess region. An active region is defined by the field oxide layer, having a first active region and a second active region. The latter has a second recess region formed in a lower portion of the active region than the former. A step gate pattern is formed on a border region between the first active region and the second active region. The gate pattern has a step structure whose one side extends to a surface of the first active region and the other side extends to a surface of the second active region. Other embodiments are also described.
Claims23
A semiconductor device, comprising:
- a trench formed in a predetermined portion of a substrate and a first recess region beneath the trench;
- a field oxide layer buried into the trench and the first recess region;
- an active region defined by the field oxide layer, and having a first active region and a second active region, the second active region having a second recess region formed in a lower portion of the active region than the first active region;
- and
- a step gate pattern on a border region between the first active region and the second active region, wherein the gate pattern has a step structure whose one side extends to a surface of the first active region and the other side extends to a surface of the second active region.
A semiconductor device, comprising:
- a trench formed in a predetermined portion of a substrate and a first recess region beneath the trench, wherein a field oxide layer is buried into the trench and the first recess region;
- an active region defined by the field oxide layer and having a second recess region with a predecided depth;
- and
- a recess gate pattern whose lower portion is buried into the second recess region and whose upper portion projects above a surface of the active region.
A method for fabricating a semiconductor device, comprising:
- forming a trench in a device isolation region of a substrate in which the device isolation region and an active region are defined;
- forming a first recess region whose end points extend to the active region at a bottom portion of the trench;
- forming a field oxide layer buried into the first recess region and the trench;
- forming a second recess region by etching a preset portion of the active region to a predecided depth, thereby providing a second active region whose height is lower than that of a first active region;
- and
- forming a gate pattern on a border region between the first active region and the second active region, wherein the gate pattern has a step structure whose one side extends to a surface of the first active region and the other side extends to a surface of the second active region.
A method for fabricating a semiconductor device, comprising:
- forming a trench in a device isolation region of a substrate in which the device isolation region and an active region are defined;
- forming a first recess region whose end points laterally extend to the active region at a bottom portion of the trench;
- forming a field oxide layer buried into the first recess region and the trench;
- forming a second recess region by etching a predetermined portion of the active region to a predecided depth;
- and
- forming a recess gate pattern whose bottom portion is buried into the second recess region and top portion projects above a surface of the active region.
Dependencies are inferred from the claim text.