Semiconductor device and method for fabricating the same
AssigneeFujitsu Limited
InventorJusuke Ogura
Life of this patent
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Abstract
The semiconductor device comprises a silicon substrate 14 having a step formed in the surface which makes the surface in a flash memory cell region 10 lower than the surface in a peripheral circuit region 12; a device isolation region 20a formed in a trench 18 in the flash memory cell region 10; a device isolation region 20c formed in a trench 24 deeper than the trench 18 in the peripheral circuit region 12; a flash memory cell 46 including a floating gate 32 and a control gate 40 formed on the device region defined by the device isolation region 20a; and transistors 62, 66 formed on the device regions defined by the device isolation region 20c.
Claims20
A semiconductor device comprising:
- a semiconductor substrate having a step in a surface which makes a surface of a first region lower than a surface of a second region;
- a first device isolation region formed in a first trench formed in the semiconductor substrate in the first region;
- a second device isolation region formed in a second trench formed in the semiconductor substrate in the second region, the second trench being deeper than the first trench;
- a memory cell including a floating gate formed on a first device region defined by the first device isolation region, with a first insulation film formed therebetween, and a control gate formed on the floating gate with a second insulation film formed therebetween;
- and
- a transistor formed on a second device region defined by the second device isolation region.
A method for fabricating a semiconductor device comprising the steps of:
- forming a first conduction film to be a floating gate on a semiconductor substrate in a first region with a first insulation film formed therebetween, the first insulation film having etching characteristics different from those of the semiconductor substrate;
- forming a mask having a first opening formed in the first region and a second opening formed in a second region on the first conduction film and the semiconductor substrate in the second region;
- etching the first conduction film, the first insulation film and the semiconductor substrate exposed in the first opening while etching the semiconductor substrate exposed in the second opening to form a first trench in the semiconductor substrate in the first region while forming a second trench deeper than the first trench in the semiconductor substrate in the second region, the first conduction film being patterned to be the floating gate;
- forming a first device isolation region in the first trench defining a first device region while forming a second device isolation region in the second trench defining a second device region;
- and
- forming a control gate on the floating gate with a second insulation film formed therebetween while forming a gate electrode of a transistor on the second device region.
Dependencies are inferred from the claim text.