Back to results
US 2006/0216898 A1Published application
Building fully-depleted and partially-depleted transistors on same chip
AssigneeTexas Instruments Incorporated
InventorHoward Tigelaar
Life of this patent
Estimating the term…
Abstract
A method (10) of forming fully-depleted silicon-on-insulator (FD-SOI) transistors (150) and partially-depleted silicon-on-insulator (FD-SOI) transistors (152) on a semiconductor substrate (104) as part of an integrated circuit fabrication process is disclosed.
Claims20
A method of forming a fully-depleted silicon-on-insulator (FD-SOI) transistor and a partially-depleted silicon-on-insulator (PD-SOI) transistor as part of an integrated circuit fabrication process, comprising:
- providing a silicon-on-insulator (SOI) substrate which comprises a layer of silicon material formed over a layer of insulating material which is formed over a semiconductor substrate;
- thinning the layer of silicon material to a thickness suitable for forming a partially-depleted transistor by growing a first grown layer of oxide material over the layer of silicon material, where growing the first grown layer of oxide material thins the layer of silicon material by consuming silicon as part of the growth process;
- forming a layer of nitride material over the first grown layer of oxide material;
- patterning the layer of nitride material, the first grown layer of oxide material and the layer of silicon material to establish trenches therein;
- depositing a layer of dielectric material that fills in the trenches;
- planarizing the deposited layer of dielectric material;
- masking off an area of the SOI substrate wherein the partially-depleted transistor is to be formed;
- removing the layer of nitride material in an area where the fully-depleted transistor is to be formed;
- removing the first grown layer of oxide material in the area where fully-depleted transistor is to be formed;
- unmasking the area of the SOI substrate where the partially-depleted transistor is to be formed;
- thinning the layer of silicon material in the area where the fully-depleted transistor is to be formed to a thickness suitable for forming the fully-depleted transistor by growing a second grown layer of oxide material over the layer of silicon material, where growing the second grown layer of oxide material thins the layer of silicon material by consuming silicon as part of the growth process;
- removing the layer of nitride material in the area where the partially-depleted transistor is to be formed;
- removing the first grown layer of oxide material in the area where the partially-depleted transistor is to be formed and removing the second grown layer of oxide material in the area where the fully-depleted transistor is to be formed;
- and
- forming the partially-depleted transistor in the area where the partially-depleted transistor is to be formed and forming the fully-depleted transistor in the area where the fully-depleted transistor is to be formed.
12 more elements
A method of forming a fully-depleted silicon-on-insulator (FD-SOI) transistor and a partially-depleted silicon-on-insulator (FD-SOI) transistor as part of an integrated circuit fabrication process, comprising:
- providing a silicon-on-insulator (SOI) substrate which comprises a layer of silicon material formed over a layer of insulating material which is in turn formed over a semiconductor substrate;
- converting at least some of the SOI substrate into an area where the partially-depleted transistor can be formed and converting at least some of the SOI substrate into an area where the fully-depleted transistor can be formed;
- and
- forming the partially-depleted transistor in the area where the partially-depleted transistor can be formed and forming the fully-depleted transistor in the area where the fully-depleted transistor can be formed.
1 more element
An integrated circuit, comprising:
- a fully-depleted transistor and a partially-depleted transistor formed on a single semiconductor substrate, where the fully-depleted and partially-depleted transistors are formed as part of an integrated circuit fabrication process, and where the fully-depleted transistor is formed within a silicon-on-insulator (SOI) region of the semiconductor substrate that has been thinned more than a silicon-on-insulator (SOI) region of the semiconductor substrate wherein the partially-depleted transistor is formed.
Dependencies are inferred from the claim text.