Non-volatile memory device and method of fabricating the same

A method of fabricating a non-volatile memory device, comprising the steps of:

• forming a device isolation layer and a stack insulating layer, wherein the device isolation layer is formed in a predetermined area of a semiconductor substrate to define an active region, and the stack insulating layer includes first, second and third insulating layers which are sequentially stacked at least on the active region;
• forming a gate electrode crossing the active region on the stack insulating layer;
• and
• forming a charge storage layer and a blocking insulating layer which are sequentially stacked between the first insulating layer and the gate electrode by patterning the third to second insulating layers,
• wherein at least the second insulating layer is patterned so that the charge storage layer has a protruding part which protrudes from the sidewall of the gate electrode.

A method of fabricating a non-volatile memory device with a cell array region and a peripheral circuit region, comprising the steps of:

• forming not only a device isolation layer in a predetermined area of a semiconductor substrate to define a first active region and a second active region in the cell array region and the peripheral circuit region, respectively, but also a stack insulating layer including first, second and third insulating layers which are sequentially stacked on the first active region, and a gate insulating layer stacked on the second active region;
• forming a plurality of wordlines crossing over the stack insulating layer, and a gate electrode crossing over the gate insulating layer;
• and
• patterning at least the third and second insulating layers to form a charge storage layer and a blocking insulating layer which are sequentially stacked between the first insulating layer and the wordlines,
• wherein at least the second insulating layer is patterned so that the charge storage layer has a protruding part which protrudes from a sidewall of the wordlines.