US 2006/0216879 A1Published application

Method for manufacturing junction semiconductor device

AssigneesHonda Motor Co., Ltd., Shindengen Electric Manufacturing Co., Ltd.

InventorsKen-ichi Nonaka, Hideki Hashimoto, Seiichi Yokoyama, Kensuke Iwanaga, Yoshimitsu Saito, Hiroaki Iwakuro, Masaaki Shimizu, Yusuke Fukuda, Koichi Nishikawa, Yusuke Maeyama

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Abstract

A method for manufacturing a junction semiconductor device, having a step for forming a first high-resistance layer, a step for forming a channel-doped layer, a step for forming a second high-resistance layer, a step for forming a low-resistance layer of a first conductive type that acts as a source region, a step for performing partial etching to a midway depth of the second high-resistance layer and the low-resistance layer, a step for forming a gate region below the portion etched in the etching step, and a step for forming a protective film on the surface of the region between the gate region and the source region. A gate region is formed using relatively low energy ion implantation in the surface that has been etched in advance to a height that is between the lower surface of the source area and the upper surface of the channel-doped layer.

Claims4

Dependent claims

A method for manufacturing a junction semiconductor device, comprising:

forming a first high-resistance layer on one surface of a semiconductor substrate of a first conductive type;
forming a channel-doped layer on said first high-resistance layer;
forming a second high-resistance layer on said channel-doped layer;
forming a low-resistance layer of a first conductive type that acts as a source region on said second high-resistance layer;
performing partial etching to a midway depth of said second high-resistance layer and said low-resistance layer;
forming a gate region below said etched portion;
forming a protective film on the surface of the region between said gate region and said source region;
joining a source electrode on said low-resistance layer;
a gate electrode on said gate region, and a drain electrode on the other surface of said semiconductor substrate;
and
forming an upper layer electrode above the source electrode and the gate electrode.

8 more elements

Dependencies are inferred from the claim text.