Method for forming low temperature polysilicon thin film transistor with low doped drain structure

A method for forming a low temperature polysilicon thin film transistor with a low doped drain structure, comprising:

• forming a polysilicon island on a substrate;
• forming a dielectric layer, a metal layer and a cap layer in sequence to cover the polysilicon island;
• forming a photo-resist patterened layer on the cap layer, removing the portion of the metal layer and the portion of the cap layer which are uncovered by the photo-resist patterned layer, wherein the width of the remaining cap layer is smaller than the width of the remaining metal layer, and the difference between the width of the remaining cap layer and that of the remaining metal layer is within a predetermined range;
• performing a high concentration ion-doping using the metal layer as a mask to form a heavily doped region in the portion of the polysilicon island uncovered by the metal layer;
• removing the portion of the metal layer uncovered by the remaining cap layer;
• and
• performing a low concentration ion-doping using the metal layer as a mask to form a low doped region in the portion of the polysilicon island.