Manufacturing CCDs in a conventional CMOS process
AssigneeKenet, Inc.
InventorsGerhard Sollner, Lawrence Kushner, Michael Anthony, Edward Kohler, Wesley Grant
Life of this patent
Estimating the term…
Abstract
A technique for forming Charge-Coupled Devices (CCDs) in a conventional Complementary Metal Oxide Semiconductor (CMOS) process. A number of single-layer polysilicon gates are formed on an as-grown, native doped silicon substrate, with gaps between them. Masking is used to selectively dope the gates while preventing doping of the silicon in the gaps. Masking may likewise be used to selectively silicide the gates while preventing silicide formation in the gaps. Conventional source-drain processing produces input/output diffusions for the CCD.
Claims30
A method of forming a Charge-Coupled Device (CCD) in a Complementary Metal Oxide Semiconductor (CMOS) process comprising:
- providing a substrate having a charge-carrying region;
- forming a gate oxide layer on the charge-carrying region;
- forming a plurality of single layer polysilicon gates on the gate oxide layer, by depositing a polysilicon layer on the gate oxide layer and then patterning the polysilicon layer to define the individual single layer polysilicon gates and a plurality of gaps therebetween;
- positioning a mask to define masked regions and unmasked regions substantially aligned with the gaps and the gates, respectively;
- and
- applying a dopant selectively into the unmasked regions associated with each of the plurality of single layer polysilicon gates, wherein the masked regions prevent penetration of the dopants into the gap regions.
A method of forming a Charge-Coupled Device (CCD) in a Complementary Metal Oxide Semiconductor (CMOS) process comprising:
- providing a substrate having a charge-carrying region;
- preserving an as-grown, native doping level of the substrate;
- forming a gate oxide layer on the charge-carrying region;
- and
- forming a plurality of single layer polysilicon gates on the gate oxide layer, by depositing a polysilicon layer on the gate oxide layer and then patterning the polysilicon layer to define the individual single layer polysilicon gates and a plurality of gaps therebetween.
A method of forming a Charge-Coupled Device (CCD) in a Complementary Metal Oxide Semiconductor (CMOS) process comprising:
- providing a substrate having a charge-carrying region;
- preserving an as-grown, native doping level of the substrate;
- forming a gate oxide layer on the charge-carrying region;
- forming a plurality of gates on the gate oxide layer, by depositing a layer of conductive material on the gate oxide layer and then patterning said conductive material layer to define the individual gates and a plurality of gaps therebetween;
- and
- preventing doping in said gaps during further processing by use of photomasking steps available in said CMOS process.
Dependencies are inferred from the claim text.