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US 2006/0214269 A1Published application
Semiconductor device which prevents peeling of low-permittivity film by using multilevel interconnection
AssigneeKabushiki Kaisha Toshiba
InventorHidetoshi Koike
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Abstract
A semiconductor device includes an alignment mark which is arranged adjacent to each corner of a semiconductor chip, and a plug which contacts the alignment mark. The alignment mark is formed by part of the uppermost interconnection layer in a multilevel interconnection which is formed on the semiconductor chip and obtained by stacking low-permittivity insulating layers and interconnection layers. The plug is buried in a contact hole formed in the low-permittivity insulating layer below the alignment mark, and contacts the alignment mark.
Claims8
A semiconductor device comprising:
- a semiconductor chip;
- a guard ring which is formed by part of an uppermost interconnection layer in a multilevel interconnection that is formed on the semiconductor chip and obtained by stacking low-permittivity insulating layers and interconnection layers, the guard ring being arranged adjacent to each corner of the semiconductor chip;
- and
- a conductive member which is buried in a contact hole formed in the low-permittivity insulating layer below the guard ring, and contacts the guard ring.
1 more element
Dependencies are inferred from the claim text.