Semiconductor device having fuse pattern and methods of fabricating the same
AssigneeSamsung Electronics Co., Ltd.
InventorsTai-Heui Cho, Kun-Gu Lee
Life of this patent
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Abstract
A semiconductor device includes a semiconductor substrate having a fuse region and an interconnection region, a first insulating layer formed in the fuse region and the interconnection region, a fuse pattern formed on the first insulating layer in the fuse region, the fuse pattern including a first conductive pattern and a first capping pattern, an interconnection pattern formed on the first insulating layer in the interconnection region, including a second conductive pattern and a second capping pattern, and having a thickness greater than the thickness of the fuse pattern, and a second insulating layer formed on the first insulating layer and covering the fuse pattern.
Claims27
A semiconductor device comprising:
- a semiconductor substrate having a fuse region and an interconnection region;
- a first insulating layer formed in the fuse region and the interconnection region;
- a plurality of fuse patterns formed on the first insulating layer in the fuse region, each fuse pattern including a first conductive pattern and a first capping pattern, and the fuse patterns having substantially uniform thicknesses;
- an interconnection pattern formed on the first insulating layer in the interconnection region, including a second conductive pattern and a second capping pattern, and having a thickness greater than the thickness of the fuse patterns;
- and
- a second insulating layer formed on the first insulating layer and covering the fuse patterns.
A method of fabricating a semiconductor device comprising:
- providing a semiconductor substrate having a fuse region and an interconnection region;
- forming a conductive layer on the semiconductor substrate;
- partially etching the conductive layer inside the fuse region to form a fuse conductive layer having a thickness thinner than a thickness of the conductive layer outside of the fuse region;
- and
- patterning the conductive layer and the fuse conductive layer to form a first conductive pattern inside the fuse region and a second conductive pattern inside the interconnection region.
A semiconductor device comprising:
- a semiconductor substrate having a fuse region and an interconnection region;
- a first insulating layer formed in the fuse region and the interconnection region;
- a fuse pattern formed on the first insulating layer in the fuse region, the fuse pattern including a first conductive pattern and a first capping pattern;
- an interconnection pattern formed on the first insulating layer in the interconnection region, including a second conductive pattern and a second capping pattern, and having a thickness greater than the thickness of the fuse pattern;
- a second insulating layer formed on the first insulating layer and covering the fuse pattern.
Dependencies are inferred from the claim text.