Semiconductor integrated circuit
AssigneeOki Electric Industry Co., Ltd.
InventorShigeru Nagatomo
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit has complementary field-effect transistors, one formed in a semiconductor substrate, the other formed in a well in the substrate, and has four power-supply potentials: two supplied to the sources of the field-effect transistors, one supplied to the substrate, and one supplied to the well. An unwanted pair of parasitic bipolar transistors are formed in association with the field-effect transistors. An intentionally formed bipolar transistor operates in series with one of the unwanted parasitic transistors and as a current mirror for the other unwanted parasitic transistor, limiting the flow of unwanted current through the parasitic bipolar transistors.
Claims20
A semiconductor integrated circuit comprising:
- a first semiconductor region of a first conductive type;
- a second semiconductor region of a second conductive type;
- a first field-effect transistor of a first channel type, having a source and drain disposed in the first semiconductor region;
- a second field-effect transistor of a second channel type, having a source and drain disposed in the second semiconductor region;
- a first power line for biasing the source of the first field-effect transistor to a first potential;
- a second power line for biasing the first semiconductor region to a second potential differing from the first potential;
- and
- a bipolar transistor having an emitter connected to the first power line, a base connected to the second power line, and a collector connected to the second power line.
A semiconductor integrated circuit comprising:
- a semiconductor substrate having a first well of a first conductive type, the semiconductor substrate being of a second conductive type;
- a first field-effect transistor formed in the first well, the first field-effect transistor having a first doped region of the second conductive type connected to a first power line, a second doped region of the second conductive type, a first gate electrode disposed between the first and second doped regions, and an oxide film separating the first gate electrode from the surface of the first well;
- a first highly doped well-biasing region of the first conductive type formed in the first well and connected to a second power line;
- a second field-effect transistor formed in the semiconductor substrate, the second field-effect transistor having a third doped region of the first conductive type connected to a third power line, a fourth doped region of the first conductive type, a second gate electrode disposed between the third and fourth doped regions, and an oxide film separating the second gate electrode from the surface of the semiconductor substrate;
- a highly doped substrate-biasing region of the second conductive type formed in the semiconductor substrate and connected to a fourth power line;
- and
- a bipolar transistor having a base of the first conductive type, and a collector and an emitter of the second conductive type, the base and the collector being electrically connected to the first highly doped well-biasing region, the emitter being connected to the first power line.
A semiconductor integrated circuit comprising:
- a semiconductor substrate having a well of a first conductive type, the semiconductor substrate being of a second conductive type;
- a first field-effect transistor formed in the well, the first field-effect transistor having a first doped region of the second conductive type connected to a first power line, a second doped region of the second conductive type, a first gate electrode disposed between the first and second doped regions, and an oxide film separating the first gate electrode from the surface of the well;
- a highly doped well-biasing region of the first conductive type formed in the well and connected to a second power line;
- a second field-effect transistor formed in the semiconductor substrate, the second field-effect transistor having a third doped region of the first conductive type connected to a third power line, a fourth doped region of the first conductive type, a second gate electrode disposed between the third and fourth doped regions, and an oxide film separating the second gate electrode from the surface of the semiconductor substrate;
- a first highly doped substrate-biasing region of the second conductive type formed in the semiconductor substrate and connected to a fourth power line;
- and
- a bipolar transistor having a base of the second conductive type, and a collector and an emitter of the first conductive type, the base and the collector being connected to the first highly doped substrate-biasing region and the emitter being connected to the third power line.
Dependencies are inferred from the claim text.