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US 2006/0214230 A1Published application
SOS wafer and manufacturing method thereof
AssigneeOki Semiconductor Co., Ltd.
InventorKimiaki Shimokawa
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Abstract
The present invention provides an SOS wafer comprising a non-transparent polysilicon layer provided on a back surface of a sapphire substrate, a silicon nitride layer which protects the polysilicon layer, and a stress relaxing film which cancels stress produced in the silicon nitride layer, wherein the silicon nitride layer and the stress relaxing film are provided on the back surface side.
Claims18
An SOS wafer comprising:
- a non-transparent polysilicon layer provided on a back surface of a sapphire substrate;
- a silicon nitride layer which protects the polysilicon layer;
- and
- a stress relaxing film which cancels stress produced in the silicon nitride layer,
- wherein the silicon nitride layer and the stress relaxing film are provided on the back surface side.
2 more elements
A method for manufacturing an SOS wafer provided with a sapphire substrate, comprising the steps of:
- forming a polysilicon layer over the sapphire substrate;
- implanting an impurity for applying conductivity in a polysilicon layer on a back surface of the sapphire substrate to form a conductive diffusion region;
- forming a silicon nitride layer for protecting the polysilicon layer, on the back surface side of the sapphire substrate;
- and
- forming a stress relaxing film for canceling stress of the silicon nitride layer, on the back surface side of the sapphire substrate.
2 more elements
Dependencies are inferred from the claim text.