Manufacture method for semiconductor device having field oxide film
AssigneeYamaha Corporation
InventorsSyuusei Takami, Hiroaki Fukami
Life of this patent
Estimating the term…
Abstract
On the principal surface of a silicon substrate, a side spacer made of silicon nitride is formed on the side wall of a lamination including a silicon oxide film, a silicon nitride film and a silicon oxide film. Thereafter, a channel stopper ion doped region is formed by implanting impurity ions by using as a mask the lamination, side spacer and resist layer. After the resist layer and side spacer are removed, a field oxide film is formed through selective oxidation using the lamination as a mask, and a channel stopper region corresponding to the ion doped region is formed. After the lamination is removed, a circuit device such as a MOS type transistor is formed in each device opening of the field oxide film.
Claims7
A semiconductor device manufacture method comprising steps of:
- preparing a silicon substrate having at least one region of one conductivity type;
- laminating a first silicon oxide film, a silicon nitride film and a second silicon oxide film in a recited order from the bottom on a principal surface of said silicon substrate;
- patterning a lamination including at least said silicon nitride film and said second silicon oxide film among said first silicon oxide film, said silicon nitride film and said second silicon oxide film, in accordance with a desired device opening pattern;
- forming a side spacer made of silicon nitride and covering a side of said lamination;
- implanting impurity ions of said one conductivity type into the principal surface of said silicon substrate by using said lamination and said side spacer as a mask to form a channel stopper ion doped region;
- and
- after said side spacer is removed, forming a field oxide film having a device opening corresponding to said lamination on the principal surface of said silicon substrate through selective oxidation using said lamination as a mask, and forming a channel stopper region of said one conductivity type on the basis of said ion doped region.
A semiconductor device manufacture method comprising steps of:
- (a) preparing a silicon substrate having a principal surface and one conductivity type at least in a device forming region;
- (b) forming an oxidation mask material layer covering said device forming region on the principal surface of said silicon substrate;
- (c) forming a first resist layer on said oxidation mask material layer in accordance with a first device opening pattern corresponding to a portion of said device forming region;
- (d) forming a first ion doped region for a channel stopper by implanting impurity ions of said one conductivity type into the principal surface of said silicon substrate via said oxidation mask material layer by using said first resist layer as a mask;
- (e) after said first ion doped region is formed, isotropically etching said first resist layer to reduce a thickness and a planar size of said first resist layer by a predetermined amount;
- (f) after said isotropical etching, patterning said oxidation mask material layer by etching using said first resist layer as a mask to form a first oxidation mask made of a left portion of said oxidation mask material layer;
- and
- (g) after said first resist layer is removed, forming a field oxide film having a device opening corresponding to said first oxidation mask on the principal surface of said silicon substrate through selective oxidation using said first oxidation mask and forming a first channel stopper region of said one conductivity type corresponding to said first ion doped region.
A semiconductor device manufacture method comprising steps of:
- preparing a silicon substrate having a principal surface and a device forming region of one conductivity type and a well region of an opposite conductivity type opposite to said one conductivity type;
- forming an oxidation mask material layer covering said device forming region and said well region on the principal surface of said silicon substrate;
- forming first and second resist layers on said oxidation mask material layer in accordance with a first device opening pattern corresponding to a portion of said device forming region and a second device opening pattern corresponding to a portion of said well region;
- forming a first ion doped region for a channel stopper by implanting impurity ions of said one conductivity type into the principal surface of said silicon substrate via said oxidation mask material layer by using said first and second resist layers as a mask;
- after said first ion doped region is formed, isotropically etching said first and second resist layers to reduce a thickness and a planar size of said first and second resist layers by a predetermined amount;
- forming a third resist layer covering said device forming region and said first resist layer, and forming a fourth resist layer not covering an ion doped region existing in said well region as a portion of said first ion doped region and covering a side of said second oxidation mask and said second resist layer;
- implanting impurity ions of said opposite conductivity type into said well region by using as a mask said third and fourth resist layers to form a second ion doped region for a channel stopper by compensating for the ion doped region existing in said well region as a portion of said first ion doped region;
- after said third and fourth resist layers and said first and second resist layers are removed, forming a field oxide film having first and second device openings corresponding to said first and second oxidation masks on the principal surface of said silicon substrate through selective oxidation using said first and second oxidation masks, a first channel stopper region having said one conductivity type and corresponding to the first ion doped region and a second channel stopper region having said opposite conductivity type and corresponding to the second ion doped region.
Dependencies are inferred from the claim text.