Strained channel complementary field-effect transistors and methods of manufacture

A semiconductor chip comprising:

• a semiconductor substrate;
• a first transistor formed in the semiconductor substrate, the first transistor having a first channel region formed from a first semiconductor material and having a first source and a first drain region formed in the substrate oppositely adjacent the first channel region, the first source and the first drain region comprising a second semiconductor material that is lattice-mismatched with the first semiconductor material;
• and
• a second transistor formed in the semiconductor substrate and having a conductivity type different than a conductivity type of the first transistor, the second transistor having a second channel region formed from the first semiconductor material, the second transistor also having a second source and a second drain region formed in the substrate oppositely adjacent the second channel region, the second source and second drain regions comprising a material different than the second semiconductor material.

A semiconductor device comprising:

• a silicon substrate;
• a p-channel transistor formed within and above the silicon substrate, the p-channel transistor comprising:
• a first channel region located within the silicon substrate;
• a first source region and a first drain region formed in the substrate oppositely adjacent the first channel region, the first source region and the first drain region being formed from a second semiconductor material that has a natural lattice constant that is different than a natural lattice constant of silicon;
• a first gate electrode insulatively overlying the first channel region;
• a first spacer region formed adjacent a sidewall of the first gate, the first spacer region including a void adjacent the first channel;
• an n-channel transistor formed within and above the silicon substrate, the second transistor comprising:
• a second channel region formed within the silicon substrate;
• a second source region and a second drain region formed in the substrate oppositely adjacent the second channel region, the second source and second drain regions being formed from a material different than the second semiconductor material;
• a high-stress film overlying at least one of the first transistor and the second transistor.