Loading patent…
AssigneeNEC Electronics Corporation
InventorsMasaharu Mizuno, Naotaka Maeda
Estimating the term…
An ASIC includes a function layer formed with plural universal logic cells, a common layer formed with conductive strips connected to the universal logic cells and common to other ASICs and a customized layer having at least two metallization layers assigned to conductive strips extending in certain directions parallel to one another and other conductive strips extending in perpendicular directions to the certain directions, respectively, and an inter-layered insulating layer formed with conductive plugs selectively connected between the conductive strips and the other conductive strips, wherein the conductive strips have respective values of length such that the conductive plugs are located on both ends thereof, whereby the conductive strips, other conductive strips and the conductive plugs form plural signal paths reduced in total contact resistance and parasitic capacitance.
A semi-custom-made integrated circuit device comprising:
A method for forming a wiring in a semiconductor integrated circuit device based on an array structure of universal logic cells, comprising the steps of:
A wiring structure of a semiconductor integrated circuit based on an array structure of universal logic cells, comprising:
Dependencies are inferred from the claim text.