US 2006/0189029 A1 · Method for efficient annealing of plated semiconductor package leads

Abstract

A method for completing an assembled semiconductor device, which has metallic leads for connection to external parts. The method comprises the step (202) of encapsulating the assembled device with a polymeric precursor so that at least portions of the leads remain un-encapsulated. Without significant delay, these un-encapsulated lead portions are plated (203) with at least one metal layer suitable for connection to external parts; the plating step has no noticeable impact on the uncured mold compound. The encapsulated and plated device is then submitted (204) to a sequence of elevated temperatures for specified periods of time so that concurrently the precursor is polymerized and the at least one metal layer is annealed.

Claims11

Dependent claims

A method for completing an assembled semiconductor device having metallic leads for connection to external parts, comprising the steps of:

encapsulating said assembled device using a polymeric precursor so that at least portions of said leads remain un-encapsulated;
without significant intervening temperature excursion, plating said un-encapsulated lead portions with at least one metal layer suitable for connection to external parts;
and
submitting said encapsulated and plated device to a sequence of elevated temperatures for specified periods of time so that concurrently said precursor is polymerized and said at least one metal layer is annealed.

1 more element

Dependencies are inferred from the claim text.

Method for efficient annealing of plated semiconductor package leads

Life of this patent

Method for efficient annealing of plated semiconductor package leads

Life of this patent

Abstract

Claims11