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AssigneeALTERA CORPORATION, a corporation of Delaware
InventorsRoger May, Igor Kostarnov, Edward Flaherty, Mark Dickinson
Estimating the term…
The present invention provides circuitry and methods for sharing I/O pins between a programmable logic portion and an embedded processor portion of a chip. The circuits in the programmable logic portion and the embedded processor portion can access data signals from and send data signals to the same I/O pins. The data signals are multiplexed to control access to the shared I/O pins. The multiplexers may be controlled by a control signal that determines when particular I/O pins are accessed by the programmable logic portion and the embedded processor portion. Control signals that configure the associated I/O pin circuitry to the correct I/O standard are also multiplexed by the shared I/O circuitry of the present invention. Signals received at the shared I/O pins that are transmitted to the embedded processor portion may be concurrently sent to snoop circuitry within the programmable logic portion.
1-42. (canceled)
An integrated circuit having an edge and a middle portion disposed within the edge, the integrated circuitry comprising:
An integrated circuit comprising:
A method for transmitting signals to and from an integrated circuit, the method comprising:
A method of operating an integrated circuit comprising a programmable logic portion, a processor portion having a processor, and I/O pins that are accessible by the programmable logic portion and the processor portion, the method comprising:
Dependencies are inferred from the claim text.