Germanium-silicon-carbide floating gates in memories

A memory device, comprising:

• an array of memory cells, each of the memory cells comprising:
• a source region;
• a drain region;
• a semiconductive channel region separating the source and drain regions;
• a floating gate having a germanium, silicon and carbide composition, disposed adjacent the semiconductive channel region and separated therefrom by a first insulating layer;
• and
• a control gate located adjacent the floating gate and separated therefrom by a second insulating layer, the control gate coupled to a word line;
• addressing circuitry for addressing the array of memory cells;
• and
• control circuitry for controlling read and write operations of the memory device.

A method of storing data in a memory device, comprising:

• addressing selected ones of a plurality of memory cells with selected ones of a plurality of word lines and a plurality of bit lines;
• increasing a voltage applied to a control gate on the selected memory cells, the memory cells each including a substrate, a source region, a drain region and a floating gate disposed beneath the control gate and separated therefrom by an inter-gate insulator layer, the floating gate comprising a conductive film including a mixture of germanium, silicon and carbon;
• trapping electrons on the floating gate in response to a positive voltage having at least a first voltage level being applied to the control gate for at least a first time period, changing the memory cell to a first memory state;
• and
• ejecting electrons from the floating gate in response to a negative voltage having at least a second voltage level being applied to the control gate for at least a second time period, changing the memory cell to a second memory state.

A method of forming a memory cell, comprising:

• forming a source region, a drain region, and a channel region disposed between and separating the source and drain regions, in a semiconductor substrate;
• forming a gate oxide layer on the semiconductor substrate over at least the channel region and over at least portions of the source and drain regions;
• forming an electrically isolated floating gate over the channel region and over at least portions of each of the source and drain regions, the floating gate formed of a mixture consisting essentially of silicon, germanium and carbon;
• forming an inter-gate insulator over the floating gate;
• and
• forming a control gate over the inter-gate insulator and separated from the floating gate by the inter-gate insulator.

A transistor, comprising:

• a substrate having at least a source region and a drain region;
• a gate insulator disposed over the substrate and at least portions of the source and drain regions;
• and
• a gate electrode disposed over the gate insulator and at least portions of the source and drain regions formed of germanium silicon carbide, wherein the composition of the germanium silicon carbide is selected to obtain a desired threshold voltage for the transistor.