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AssigneeMicron Technology, Inc.
InventorsDinesh Chopra, Kevin Donohoe, Cem Basceri
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In a copper plating process, a seed layer is uniformly deposited over a surface, including lining a high aspect ratio trench defined by that surface. A mask layer is provided using a process that fails to deposit in the trench. In one exemplary embodiment, the failure is due to the decrease in the isotropic flux of neutrals toward the bottom of the trench. Copper is subsequently electroplated. Because the seed layer is exposed only within the trench, copper deposits only therein. The self-aligned mask prevents plating outside of the trench. A chemical-mechanical planarization step removes the mask and the seed layer extending beyond the trench, leaving a copper structure within the trench. The structure may serve as a conductive line, an interconnect, or a capacitor plate.
A method of depositing a conductive material into a trench defined by a surface of a semiconductor device, said method comprising:
A method of selectively depositing a conductive material over a surface of a semiconductor device, said method comprising:
A method of processing a semiconductor substrate comprising a first portion and a complementary second portion, said comprising:
A method of processing a circuit device comprising a surface defining a trench, said method comprising:
A method of managing a plurality of slurries comprising a first slurry configured to react with copper at a first rate and not with tantalum, a second slurry configured to react with tantalum and not with copper, and a third slurry configured to react with tantalum and with copper at a second rate slower than said first rate, said method comprising:
A method of providing tantalum and copper in a trench defined by a support surface, said method comprising:
Dependencies are inferred from the claim text.