Method for manufacturing an integrated circuit using a capping layer having a degree of reflectivity
AssigneeTexas Instruments Incorporated
InventorsManoj Mehrotra, Amitabh Jain
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Abstract
The present invention provides a method for manufacturing a semiconductor device and a method for manufacturing an integrated circuit. The method for manufacturing the semiconductor device, among other steps, includes forming a capping layer (210) over a transistor device having source/drain regions (150, 155) located over a substrate (110), the capping layer (210) having a degree of reflectivity, and annealing the transistor device through the capping layer (210) using photons (310), the annealing of the transistor device affected by the degree of reflectivity.
Claims25
A method for manufacturing a semiconductor device, comprising:
- forming a capping layer over a transistor device having source/drain regions located over a substrate, the capping layer having a degree of reflectivity;
- annealing the transistor device through the capping layer using photons, the annealing of the transistor device affected by the degree of reflectivity.
A method for manufacturing an integrated circuit, comprising:
- forming at least first and second transistor devices over a substrate, each of the first and second transistor devices having source/drain regions in the substrate;
- forming a capping layer over at least the first transistor device, the capping layer having a degree of reflectivity;
- annealing the first and second transistor devices using photons, the degree of reflectivity of the capping layer causing an annealing temperature of the first transistor device to be lower than an annealing temperature of the second transistor device;
- and
- forming interconnects within dielectric layers located over the first and second transistor devices to form an operational integrated circuit.
Dependencies are inferred from the claim text.