System clock distributing apparatus and system clock distributing method
AssigneeFujitsu Limited
InventorNobuo Uchida
Life of this patent
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AssigneeFujitsu Limited
InventorNobuo Uchida
Estimating the term…
To provide a system clock distributing apparatus and a system clock distributing method for reducing a skew of a system clock and a synchronizing signal at low cost. The system clock distributing apparatus for matching the timing of data by using the synchronizing signal includes an oscillator 1 that generates a periodical synchronizing signal and a PLL 2, a memory that stores the data, at least one CPU 13 that conducts a computing process using the data stored in the memory, at least one MAC 14 that controls an access from the CPU 13 to the memory, and at least one NB 12 that generates the system clock having a frequency that is an integral multiple of the synchronizing signal, and controls the CPU 13 and the MAC 14 based on the operation by the system clock.
A system clock distributing apparatus for matching a timing of data by using a synchronizing signal, comprising:
A multiprocessor system controller comprising:
A CPU comprising:
A memory access controller comprising:
A crossbar comprising:
A system clock distributing method for matching a timing of data using a synchronizing signal comprising:
Dependencies are inferred from the claim text.