Time limit function utilization apparatus
AssigneeKabushiki Kaisha Toshiba
InventorsHiroshi Watanabe, Kazuya Matsuzawa, Riichiro Shirota
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Abstract
A time limit function utilization apparatus includes a first function block, a second function block, a signal line which connects the first and second function blocks and allows using a desired function that is generated by accessing the first and second function blocks with each other, and a semiconductor time switch interposed in or connected to the signal line, and disables or enables mutual access between the first and second function blocks upon the lapse of a predetermined time.
Claims13
A time limit function utilization apparatus, comprising:
- a first functional block;
- a second functional block;
- a signal line which connects the first functional block and the second functional block and allows using a desired function that is generated by accessing the first functional block and the second functional block with each other;
- and
- a semiconductor time switch which is interposed in or connected to the signal line, and substantially disables or substantially enables connecting or disconnecting a signal line between the first functional block and the second functional block upon a lapse of a first predetermined time.
A time limit function utilization apparatus, comprising:
- a first functional block;
- a second functional block;
- a signal line which connects the first functional block and the second functional block and allows using a desired function that is generated by accessing the first functional block and the second functional block with each other;
- and
- a semiconductor time switch which is interposed in or connected to the signal line, and substantially disables or substantially enables mutual access between the first functional block and the second functional block upon a lapse of a first predetermined time, wherein
- the semiconductor time switch comprises a source region and a drain region formed apart from each other on a semiconductor layer, and a gate electrode insulatively formed on a channel region between the source region and the drain region,
- the source region and the drain region are used as two connection terminals of the semiconductor time switch, and
- one of the source region and the drain region is connected to the first functional block and the other of the source region and the drain region is connected to the second functional block,
- wherein in the semiconductor time switch, the channel region between the source region and the drain region is rendered conductive or nonconductive by supplying charges to a conductive region of the gate electrode in advance, the charges are removed from the conductive region of the gate electrode over time, and the channel region between the source region and the drain region is rendered nonconductive or conductive upon the lapse of the first predetermined time.
Dependencies are inferred from the claim text.