Field emission display having reduced power requirements and method
AssigneeMicron Technology, Inc.
InventorsKie Ahn, Leonard Forbes
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AssigneeMicron Technology, Inc.
InventorsKie Ahn, Leonard Forbes
Estimating the term…
A field emission display includes a substrate and a plurality of emitters formed on columns on the substrate. The display also includes a porous dielectric layer formed on the substrate and the columns. The porous dielectric layer has an opening formed about each of the emitters and has a thickness substantially equal to a height of the emitters above the substrate. The porous dielectric layer may be formed by oxidation of porous polycrystalline silicon. The display also includes an extraction grid formed substantially in a plane defined by respective tips of the plurality of emitters and having an opening surrounding each tip of a respective one of the emitters. The display further includes a cathodoluminescent-coated faceplate having a planar surface formed parallel to and near the plane of tips of the plurality of emitters. The porous dielectric layer results in columns having less capacitance compared to prior art displays. Accordingly, less electrical power is required to charge and discharge the columns in order to drive the emitters. As a result, the display is able to form luminous images while consuming reduced electrical power compared to prior art displays.
1-61. (canceled)
A semiconductor device, comprising:
The semiconductor device of claim 97 wherein the emitter tip comprises a material selected from a group consisting of:
A semiconductor device, comprising:
A method of fabricating a porous dielectric layer on a substrate having a plurality of electronic components, the method comprising:
A semiconductor substrate structure, comprising:
Dependencies are inferred from the claim text.