Method of fabricating and integrated circuit to improve soft error performance
AssigneeTexas Instruments Incorporated
InventorsXiaowei Zhu, Robert Baumann
Life of this patent
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Abstract
The present invention provides, in one aspect, a method of designing an integrated circuit 500. In this particular aspect, the method comprises reducing soft error risk in an integrated circuit 500 by locating a structure 526, 528 relative to a node 516 of the integrated circuit 500 to reduce a linear energy transfer associated with a sub-atomic particle 530, 532 into the node 516, such that the linear energy transfer does not exceed a threshold value associated with the integrated circuit 500.
Claims20
A method of designing an integrated circuit, comprising:
- reducing soft error risk in an integrated circuit by locating a structure relative a node of the integrated circuit to reduce a linear energy transfer (LET) associated with a sub-atomic particle into the node, such that the linear energy transfer does not exceed a threshold value associated with the integrated circuit.
A method of fabricating an integrated circuit, comprising:
- configuring an optimized integrated circuit design by selectively locating interconnect structures relative to source/drain regions to reduce a linear energy associated with sub-atomic particles into the source/drain regions such that the linear energy transfer does not exceed a threshold value associated with the integrated circuit;
- and
- fabricating an integrated circuit based on the optimized integrated circuit design.
An integrated circuit, comprising:
- a semiconductor substrate having transistors located thereover, each of the transistors having source/drain regions associated therewith;
- dielectric layers located over the transistors;
- and
- an interconnect structure interconnecting the transistors and being located on or in the dielectric layers, at least a portion of the interconnect structure being located relative to the source/drain regions to reduce a linear energy transfer associated with sub-atomic particles into the source/drain regions such that the linear energy transfer does not exceed a threshold value associated with the integrated circuit.
Dependencies are inferred from the claim text.