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US 2006/0143509 A1Published application
Methods and apparatus for disabling error countermeasures in a processing system
AssigneeSony Computer Entertainment Inc.
InventorYasukichi Okawa
Life of this patent
Estimating the term…
Abstract
Methods and apparatus are provided for disabling error handling countermeasures in various processing contexts, such as by monitoring whether a given processing context requires error handling countermeasures; and disabling any recoverable error correction countermeasures when such countermeasures are not required.
Claims62
A method of processing instructions and data, comprising:
- determining whether an error correction countermeasure should be used in association with an instruction or data;
- and
- disabling the use of the error correction countermeasure based on the determination.
A processor for processing instructions and data, comprising:
- means for analyzing an instruction or the data to determine whether an error correction countermeasure should be used in association with the instruction or the data;
- and
- means for disabling the error correction countermeasure based upon the determination.
A system capable of processing error correction countermeasures associated with instructions and data, the system comprising:
- a processor including:
- means for analyzing a selected instruction or selected data to determine whether any error correction countermeasures should be used in association with the selected instruction or the selected data,
- means for enabling or disabling at least one of the error correction countermeasures in accordance with the determination, if the means for determining determines that the selected instruction or the selected data should be executed by the processor, and
- means for propagating the selected instruction or the selected data;
- and
- a device operable to receive the selected instruction or the selected data from the propagating means.
3 more elements
A method of processing instructions, comprising:
- obtaining an address associated with an instruction issued by a processor;
- determining whether the address is within a predetermined range of addresses in a memory;
- and
- disabling any error correction countermeasures when the address is within the predetermined range.
1 more element
A method of processing instructions, comprising:
- obtaining an address from a data transfer command issued by a processor;
- accessing an address translation table to determine a physical address in a memory that is associated with the address of the data transfer command;
- accessing an attribute table to obtain an error correction attribute that is associated with at least one of the address of the data transfer command and the physical address;
- and
- disabling at least one error correction countermeasure when the associated attribute so indicates.
2 more elements
A storage medium storing a program for use by a processor, the program causing the processor to:
- determine whether an error correction countermeasure should be used in association with an instruction or data;
- and
- disable the use of the error correction countermeasure based on the determination.
A processing system for processing instructions, comprising:
- a plurality of processing devices operable to issue instructions, execute instructions, or both issue and execute instructions, a first one of the processing devices comprising a processing unit or a sub-processing unit;
- wherein the first of the processing devices is programmed to determine whether an error correction countermeasure should be used in association with a selected instruction, and to disable the use of the error correction countermeasure based on the determination.
A processor for processing instructions, comprising:
- a processing element including a bus, a processing unit and a plurality of sub-processing units connected to the processing unit by the bus, the processor being connectable to a memory and being operable to issue instructions, execute instructions, or both issue and execute instructions;
- wherein the processor is programmed to determine whether an error correction countermeasure should be used in association with a selected instruction, and to disable the use of the error correction countermeasure based on the determination.
A computer processing system, comprising:
- a user input device;
- a display interface for attachment of a display device;
- and
- a processor comprising one or more processing elements, at least one of the processing elements being programmed to issue instructions, to execute instructions, to determine whether an error correction countermeasure should be used in association with a selected instruction, and to disable the use of the error correction countermeasure based on the determination.
1 more element
A computer network, comprising:
- a plurality of computer processing systems connected to one another via a communications network, each of the computer processing systems comprising:
- a user input device;
- a display interface for attachment of a display device;
- and
- a processor comprising one or more processing elements, at least one of the processing elements being programmed to issue instructions, to execute instructions, to determine whether an error correction countermeasure should be used in association with a selected instruction, and to disable the use of the error correction countermeasure based on the determination.
2 more elements
A system comprising:
- a plurality of processors configured to execute processor tasks;
- an execution unit for managing a reallocation of the processor tasks among the plurality of processors;
- and
- a detecting unit for detecting an attribute of a selected one of the processor tasks;
- wherein the execution unit reallocates the processor tasks depending upon the attribute of the selected processor task.
2 more elements
A method of processing instructions, comprising:
- determining an initial allocation of processor tasks among multiple processors;
- detecting an attribute associated with a selected one of the processor tasks;
- and
- reallocating the processor tasks based upon the attribute of the selected processor task.
1 more element
Dependencies are inferred from the claim text.