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US 2006/0141731 A1Published application
Method for forming shallow trench isolation in semiconductor device
AssigneeDongbuAnam Semiconductor Inc.
InventorJung Kim
Life of this patent
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Abstract
A method for forming shallow trench isolation in a semiconductor device. The method includes forming a pad oxide and a pad nitride on a semiconductor substrate in successive order, forming a trench in the substrate by etching the pad nitride, the pad oxide and the substrate, removing a portion of the pad oxide to expose top corners of the trench, and rounding the exposed portion of the top corners of the trench by a wet chemical etch.
Claims6
A method for forming shallow trench isolation in a semiconductor device, comprising the steps of:
- (a) forming a pad oxide and a pad nitride on a semiconductor substrate in successive order;
- (b) forming a trench in the substrate by etching the pad nitride, the pad oxide and the substrate;
- (c) removing a portion of the pad oxide to expose top corners of the trench;
- and
- (d) rounding the exposed portion of the top corners of the trench by a wet chemical etch.
2 more elements
A semiconductor device comprising:
- a pad oxide and a pad nitride formed successively on a semiconductor substrate;
- and
- a trench formed in the pad nitride, the pad oxide and the substrate,
- wherein a portion of the pad oxide is removed to expose a top corner of the substrate at a side of the trench, and
- wherein a portion of the top corner is removed to form a rounded surface.
2 more elements
Dependencies are inferred from the claim text.