Process for manufacturing integrated resistive elements with silicidation protection
AssigneeSTMicroelectronics S.r.I.
InventorsAlessandro Grossi, Roberto Bez, Giorgio Servalli
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Abstract
In a process for the fabrication of integrated resistive elements with protection from silicidation, at least one active area (15) is delimited in a semiconductor wafer (10). At least one resistive region (21) having a predetermined resistivity is then formed in the active area (15). Prior to forming the resistive region (21), however, a delimitation structure (20) for delimiting the resistive region (21) is obtained on top of the active area (15). Subsequently, protective elements (25) are obtained which extend within the delimitation structure (20) and coat the resistive region (21).
Claims19
A process for the fabrication of integrated resistive elements with protection from silicidation, comprising:
- delimiting at least one active area in a semiconductor substrate;
- and
- forming at least one resistive region having a pre-set resistivity in said active area;
- forming a delimitation structure that delimits said resistive region on top of said active area;
- and
- providing silicidation protective elements which extend within said delimitation structure and cover said resistive region.
A process for integrated circuit fabrication, comprising:
- defining an active area in a semiconductor substrate;
- forming a resistive region having a pre-set resistivity in the active area;
- forming a polysilicon structure which delimits the resistive region;
- depositing a protective layer over the polysilicon structure and resistive region;
- etching the protective layer back to expose the polysilicon structure without uncovering the resistive region;
- and
- siliciding the exposed polysilicon structure without affecting the pre-set resistivity in the active area.
A process for integrated circuit fabrication, comprising:
- defining a non-transistor active area in a semiconductor substrate;
- forming a resistive region having a pre-set resistivity in the active area;
- forming a non-gate associated polysilicon structure which delimits the resistive region;
- depositing a protective layer over the polysilicon structure and resistive region;
- etching the protective layer back to expose the polysilicon structure without uncovering the resistive region;
- and
- siliciding the exposed polysilicon structure without affecting the pre-set resistivity in the active area.
Dependencies are inferred from the claim text.