Method for forming landing plug contact in semiconductor device

A method for forming a landing plug contact in a semiconductor device, comprising the steps of:

• forming a plurality of gate structures on a substrate, each gate structure including a gate hard mask;
• forming an inter-layer insulation layer over the gate structures;
• planarizing the inter-layer insulation layer until the gate hard mask is exposed;
• forming an etch barrier layer on the inter-layer insulation layer;
• etching a predetermined portion of the inter-layer insulation layer by using the etch barrier layer as an etch barrier to form a plurality of contact holes;
• forming a polysilicon layer for forming the landing plug contacts until the polysilicon layer fills the contact holes;
• removing surface roughness created during the formation of the polysilicon layer by a first etch-back process;
• and
• planarizing the polysilicon layer by a second etch-back process until the gate hard mask is exposed, wherein the second etch-back process is carried out under a recipe that gives an anisotropic dry etching of the polysilicon layer.

A method for forming a landing plug contact in a semiconductor device comprising the steps of:

• a) selectively etching a portion of an inter-layer insulation layer using a patterned first insulation layer as an etch barrier to form a plurality of contact holes;
• b) forming a conductive layer over the structure resulting from said step a) to fill the contact holes;
• c) performing an etch-back process on the conductive layer to open the contact holes;
• d) forming a second insulation layer on the structure resulting from said step c) until the contact holes are filled;
• e) performing a first etch back process on the second insulation layer to remove surface roughness;
• f) performing a second etch-back process on the structure resulting from said step e) to isolate the landing plug contacts and to fill the contact holes, wherein the second etch-back process is carried out under a recipe that gives an anisotropic dry etching of the conductive layer.