Semiconductor device and manufacturing method thereof
AssigneeDongbuAnam Semiconductor Inc.
InventorYong-Soo Cho
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Abstract
A semiconductor device according to a exemplary embodiment of the present invention includes a reverse spacer exposing a part of an epitaxial silicon layer on a silicon substrate, a gate oxide layer on at least the epitaxial silicon layer and a gate polysilicon layer on the gate oxide layer and at least part of the reverse spacer, and source/drain terminals including a first doped (shallow junction) region in the silicon substrate at a position exterior to the exposed epitaxial silicon layer and a second doped (deep junction) region neighboring the first doped region. The semiconductor device can thus have an epitaxial silicon channel of nanometer size, an ultra-shallow junction, and a deep junction.
Claims20
A semiconductor device, comprising:
- a reverse spacer exposing a part of an epitaxial silicon layer on a silicon substrate;
- a gate oxide layer on the epitaxial silicon layer;
- a gate polysilicon layer on the gate oxide layer and at least in part on the reverse spacer;
- and
- source/drain terminals comprising a first doped region in the silicon substrate at a position exterior to the exposed epitaxial silicon layer and a second doped region neighboring the first doped region.
A semiconductor device, comprising:
- a reverse spacer exposing a part of a highly doped epitaxial silicon layer on a silicon substrate;
- an undoped epitaxial silicon layer under the highly doped epitaxial silicon layer;
- a gate oxide layer on the highly doped epitaxial silicon layer;
- a gate polysilicon layer on the gate oxide layer and at least in part on the reverse spacer;
- and
- source/drain terminals comprising a first doped region in the silicon substrate at a position exterior to the exposed highly doped epitaxial silicon layer and a second doped region neighboring the first doped region.
A method of manufacturing a semiconductor device, comprising:
- introducing germanium ions into a silicon substrate;
- forming a first epitaxial silicon layer on the silicon substrate;
- forming a hard mask pattern on the first epitaxial silicon layer;
- forming a second epitaxial silicon layer on the first epitaxial silicon layer at a position exposed by the hard mask pattern;
- removing the hard mask pattern;
- forming a reverse spacer on a sidewall of the second epitaxial silicon layer so as to expose a part of the first epitaxial silicon layer;
- forming a gate oxide layer on at least the exposed first epitaxial silicon layer;
- forming a gate polysilicon layer on the gate oxide layer and at least in part on the reverse spacer;
- forming a shallow junction region in the substrate, at least in part under the reverse spacer;
- forming a gate spacer on sidewalls of the gate polysilicon layer;
- and
- forming a deep junction region neighboring the shallow junction region so as to form source/drain terminals.
A method of manufacturing a semiconductor device, comprising:
- sequentially forming an undoped first epitaxial silicon layer and a highly doped second epitaxial silicon layer on a silicon substrate;
- forming a hard mask pattern on the second epitaxial silicon layer;
- forming a third epitaxial silicon layer on the second epitaxial silicon layer at a position exterior exposed by the hard mask pattern;
- removing the hard mask pattern;
- forming a reverse spacer on a sidewall of the third epitaxial silicon layer so as to expose a part of the second epitaxial silicon layer;
- forming a gate oxide layer on at least the exposed second epitaxial silicon layer;
- forming a gate polysilicon layer on the gate oxide layer and at least in part on the reverse spacer;
- forming a first doped region under the reverse spacer;
- forming a gate spacer on sidewalls of the gate polysilicon layer;
- and
- forming a second doped region neighboring the first doped region so as to form source/drain terminals.
Dependencies are inferred from the claim text.