Method and system for reducing program code size

A computer readable medium having stored thereon machine executable instructions, the machine executable instructions capable of causing the machine to:

• identify a replaceable subset of instructions at a first location within a set of instructions and a matching target subset of instructions at a second location within the set of instructions;
• determine a base offset and a relative offset, wherein the base offset and the relative offset indicate an absolute offset from the first location to the second location;
• insert, prior to the first location, an instruction to cause a base offset storage element to be loaded with the base offset;
• and
• replace the replaceable subset of instructions with a second instruction to cause a program counter to be modified based on the relative offset and a value in the base offset register, wherein the modified program counter indicates the second location.

A system for compressing computer executable code, the system comprising:

• a first computer readable medium to store a set of instructions to be compressed;
• a second computer readable medium;
• a processor coupled to the first computer readable medium and the second computer readable medium, the processor configured according to executable instructions stored on the second computer readable medium to:
• identify a replaceable subset of instructions at a first location within the set of instructions stored on the first computer readable medium and a matching target subset of instructions at a second location within the set of instructions,
• determine a base offset and a relative offset, wherein the base offset and the relative offset indicate an absolute offset from the first location to the second location,
• insert, prior to the first location, an instruction in the set of instructions stored on the first computer readable medium to cause a base offset storage element to be loaded with the base offset, and
• replace the replaceable subset of instructions with a second instruction to cause a program counter to be modified based on the relative offset and a value in the base offset register, wherein the modified program counter indicates the second location.

A method for executing a computer program, the method comprising the acts of:

• in response to a first instruction, setting a base offset storage element of a processor with a value;
• in response to a second instruction that indicates a relative offset and a length, modifying a program counter of the processor based on the value in the base offset register and the relative offset;
• executing a number of instructions starting at a second location indicated by the program counter modified in response to the second instruction, wherein the length indicates the number of instructions;
• after executing the number of instructions starting at the second location, modifying the program counter to point to a third instruction adjacent to and subsequent to the second instruction.

A processor, comprising:

• a base offset storage element;
• a program counter storage element;
• an adder having a first input coupled to the base offset storage element, a second input coupled to receive a value stored in the program counter storage element, and an output coupled to the program counter storage element;
• an instruction decode unit coupled to base offset storage element and to the program counter storage element, the instruction decode unit also coupled to a third input of the adder, the instruction decode unit configured to:
• cause a base offset to be loaded into the base offset storage element in response to a first instruction that indicates the base offset,
• cause a relative offset to be coupled to the third input of the adder in response to a second instruction that indicates the relative offset, and
• cause the output of the adder to be stored in the program counter storage element.

A computing system, comprising:

• a hard disk storing a set of executable instructions;
• a processor coupled to the hard disk, the processor comprising:
• a base offset storage element;
• a program counter storage element;
• an adder having a first input coupled to the base offset storage element, a second input coupled to receive a value stored in the program counter storage element, and an output coupled to the program counter storage element;
• an instruction decode unit coupled to base offset storage element and to the program counter storage element, the instruction decode unit also coupled to a third input of the adder;
• wherein the instruction decode unit is configured to:
• cause a base offset to be loaded into the base offset storage element in response to a first instruction that indicates the base offset,
• cause a relative offset to be coupled to the third input of the adder in response to a second instruction that indicates the relative offset, and
• cause the output of the adder to be stored in the program counter storage element in response to the second instruction.

A computer readable medium having stored thereon machine executable instructions, the machine executable instructions comprising:

• a first instruction at a first location having a relative offset parameter and a length parameter, the first instruction configured to:
• cause a processor to modify a program counter based on the relative offset parameter and a value stored in a base offset storage element,
• cause the processor to execute a number of instructions starting at a second location indicated by the program counter modified in response to the first instruction, wherein the length parameter indicates the number of other instructions, and
• cause the processor to, after executing the number of instructions starting at the second location, modify the program counter to point to a third instruction adjacent to and subsequent to the second instruction.